1. Field of the Invention
The present invention relates generally to planar capacitors within integrated circuits. More particularly, the present invention relates to high areal capacitance planar capacitors within integrated circuits.
2. Description of the Related Art
In addition to resistors, transistors and diodes, integrated circuits also often have formed within their fabrications capacitors. When formed within analog integrated circuits, capacitors typically provide for proper operation of those analog integrated circuits. When formed within digital integrated circuits, capacitors typically provide charge storage locations for individual bits of digital data.
Capacitors of varying dimensions and shapes may be formed within several locations within analog or digital integrated circuits. A particularly common type of capacitor formed typically, although not exclusively, within analog integrated circuits is a planar capacitor. A schematic cross-sectional diagram illustrating an integrated circuit having a planar capacitor formed therein is shown in FIG. 1.
Shown in FIG. 1 is a semiconductor substrate 10 upon and within whose surface is formed isolation regions 12a and 12b which define the active region of the semiconductor substrate 10. Within the active region of the semiconductor substrate 10 is formed a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) comprising a gate electrode 16 aligned upon a gate oxide layer 14, and a pair of source/drain electrodes 18a and 18b formed within the exposed portion of the active region of the semiconductor substrate 10 not occupied by the gate oxide layer 14 and the gate electrode 16.
As also shown in FIG. 1, the planar capacitor within the integrated circuit comprises a first planar capacitor electrode 20 separated from a second planar capacitor electrode 24 by a planar capacitor dielectric layer 22. As illustrated by FIG. 1, the planar capacitor is formed upon the surface of an isolation region of the semiconductor substrate 10, as is typical in the art. The isolation region upon which is formed the planar capacitor is the isolation region 12b.
Although the planar capacitor as illustrated in FIG. 1 is a common and accepted fabrication of a planar capacitor within an integrated circuit, the planar capacitor as illustrated in FIG. 1 is not without problems. In particular, as integrated circuit device dimensions have continued to decrease, it has become increasingly difficult to fabricate planar capacitors, such as the planar capacitor within the integrated circuit illustrated by FIG. 1, with adequate levels of capacitance within the decreasing levels of surface area afforded to those planar capacitors within advanced integrated circuits. Planar capacitors with increasing levels of areal capacitance are thus typically needed to yield planar capacitors of adequate capacitance for proper operation of advanced integrated circuits.
It is thus towards the goal of forming high areal capacitance planar capacitors within integrated circuits having limited surface area available for those planar capacitors, that the present invention is directed.